Journal
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS
Volume 10, Issue 5, Pages 5474-5485Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2022.3163585
Keywords
Transistors; MOSFET circuits; Silicon carbide; Junctions; Logic gates; Limiting; MOSFET; Current protection; latching current limiter (LCL); satellite; silicon carbide (SiC) N-MOSFET; wide bandgap (WBG) devices
Categories
Funding
- Spanish government [RTI2018-099682-A-I00, PID2021-127707OB-C21, PRE2019-088425]
- European Space Agency (ESA)
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Latching current limiters (LCLs) provide individual overcurrent protection to payloads protecting the satellite power bus. This article presents a complete LCL design based on N-MOSFETs and explores the possibility of using silicon carbide (SiC).
Latching current limiters (LCLs) provide individual overcurrent protection to payloads protecting the satellite power bus. Under an overload, they limit the maximum current for a certain time. After this time, if the failure persists, the LCL isolates it from the power bus. The keystone of the LCLs is the current-limiting transistor. In traditional LCL designs, P-MOSFETs are used as the main current-limiting device. However, in this work, a complete LCL based on N-MOSFETs is presented. This change involves a complete redesign of the control circuitry of the LCL architecture. The use of silicon carbide (SiC) is explored to assess the possibility of operating at higher voltages and potentially at higher temperatures. This article shows a complete LCL design based on a SiC N-MOSFET. The design is tested implementing a class 10 LCL (10 A as nominal current) for a bus voltage of 100 V, a limitation current of 12 A, and a limitation time (trip-OFF time) of 1.5 ms.
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