A Co-Simulation Methodology for the Design of Integrated Silicon Spin Qubits With Their Control/Readout Cryo-CMOS Electronics

Recent years have witnessed a steady growth in the achievable quantum systems due to advancements in qubit technology across several hardware platforms. Currently entering an era of noisy intermediate-scale quantum (NISQ) systems brings additional design challenges. In these systems, each individual qubit is accompanied by a substantial amount of classical CMOS circuitry for qubit instantiation, control and readout, which is to be integrated at the cryo temperature. This work presents a methodology for the co-design and co-simulation of silicon spin qubits in quantum dots, together with their associated cryo-CMOS circuitry, relying on an established spin qubit compact model. In addition, a detailed procedure is proposed for the integration of the model into a classical design flow, which is crucial for the usability of the model in practice. This is illustrated by simulating the readout of a qubit using a complete CMOS readout chip that behaves in a realistic, nonideal way. Bringing the design to a single simulation environment allows for the capture and analysis of effects that otherwise are not possible to simulate when considering the qubits and the cryo-CMOS circuitry separately. This opens up opportunities for more robust design in the future.

Automated summary

This paper presents a methodology for the co-design and co-simulation of silicon spin qubits and their associated cryo-CMOS circuitry. By integrating the model into a classical design flow, simulation of qubit readout is achieved, opening up opportunities for more robust design in the future.