An Investigation of the Effect of the Work-Function Variation of a Monolithic 3D Inverter Stacked with MOSFETs

The effect of the work-function variation (WFV) of metal-oxide-semiconductor field-effect transistor (MOSFET) gates on a monolithic 3D inverter (M3DINV) structure is investigated in the current paper. The M3DINV has a structure in which MOSFETs are sequentially stacked. The WFV effect of the top- and bottom-tier gates on the M3DINV is investigated using technology computer-aided design (TCAD) and a Monte-Carlo sampling simulation of TCAD. When the interlayer dielectric thickness (T-ILD) changes from 5 to 100 nm, electrical parameters, such as the threshold voltage, subthreshold swing, on-current, and off-current of the top-tier N-MOSFET and the parameter changes by the change in gate voltage of the bottom-tier P-MOSFET, are investigated. As T-ILD decreases below about 30 nm, the means and standard deviations of the electrical parameters rapidly increase. This means that the coupling and its distribution are relatively large in the regime and thus should be well considered for M3D circuit simulation. In addition, due to the increase in standard deviation, the WFV effect of both the top- and bottom-tier MOSFET gates was observed to be greater than those of only the top-tier MOSFET gates and only the bottom-tier MOSFET gates.

Automated summary

The effect of work-function variation on a monolithic 3D inverter structure with stacked MOSFET gates is investigated in this paper. Using TCAD and Monte-Carlo sampling simulation, the impact of the top- and bottom-tier gates' work-function variation on the inverter is studied. It is found that as the interlayer dielectric thickness decreases, the means and standard deviations of electrical parameters rapidly increase, emphasizing the importance of considering coupling and its distribution in M3D circuit simulation.