Journal
JOURNAL OF MATERIALS SCIENCE
Volume 51, Issue 11, Pages 5082-5091Publisher
SPRINGER
DOI: 10.1007/s10853-016-9811-0
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Funding
- Korea Evaluation Institute of Industrial Technology (KEIT) - Ministry of Trade, Industry and Energy (MOTIE) [10050296]
- Industrial Strategic technology development program - Ministry of Knowledge Economy (MKE, Korea) [10041926]
- National Research Foundation of Korea (NRF) - Korea government (MSIP) [NRF-2014R1A2A1A11052588]
- Samsung Display Co., Ltd.
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The deposition of high-quality SiO2 films has been achieved through the use of both plasma-enhanced chemical vapor deposition (PE-CVD) and plasma-enhanced atomic layer deposition (PE-ALD) methods using H2Si[N(C2H5)(2)](2) as a Si precursor. We systematically investigated growth characteristics, chemical compositions, and electrical properties of PE-CVD SiO2 prepared under various deposition conditions. The SiO2 films prepared using PE-CVD showed high purity and good stoichiometry with a dielectric constant of similar to 4. In addition, the PE-ALD process of the SiO2 films exhibited well-saturated and almost linear growth characteristics of similar to 1.3 cycle(-1) without notable incubation cycles, producing pure SiO2 films. Electrical characterization of metal-oxide silicon capacitor structures prepared with each SiO2 film showed that PE-ALD SiO2 films had relatively lower leakage currents than PE-CVD SiO2 films. This might be a result of the saturated surface reaction mechanism of PE-ALD, which allows a smooth surface in comparison with PE-CVD method. In addition, the dielectric properties of both SiO2 films were further evaluated in the structures of In-Ga-Zn-O thin-film transistors, and they both showed good device performances in terms of high I (on) - I (off) ratios (> 10(8)) and low off-currents (< 10(-11) A). However, based on the negative bias stress reliability test, it was found that PE-ALD SiO2 showed better reliability against a negative V (th) shift than PE-CVD SiO2, which might also be understood from its smoother channel/insulator interface generation at the interface.
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