Si nanowire-based micro-capacitors fabricated with metal assisted chemical etching for integrated energy storage applications

Metal-Insulator-Semiconductor micro-capacitors for on-chip energy storage were fabricated and characterized. The capacitors were based on Si nanowires fabricated by Metal Assisted Chemical Etching. 1.2 mu m long nano-wires with 100 nm average diameter were created leading to an effective area increase of 6.28, as compared to a flat surface. Nanowires were chemically treated to reduce surface roughness and electronic states and were coated by a HfO(2 )layer, deposited by Atomic Layer Deposition, to act as the dielectric. Al and Cu were deposited as two possible top metal electrodes. The use of Al as the top electrode was shown to create a parasitic interface oxide between the metal and the dielectric, reducing the measured capacitance. The use of Cu was shown to significantly reduce this problem, leading to more efficient devices. Capacitors with 5.4 mu F/cm(2 )capacitance and 8.9 x 10(-7) A/cm(2) leakage current at-2.5 V were demonstrated along with a cutoff frequency of 10(4) Hz. These values make the demonstrated capacitors very attractive for on-chip energy storage applications.

Automated summary

Metal-Insulator-Semiconductor micro-capacitors fabricated using Si nanowires show potential for on-chip energy storage applications. Copper electrodes were found to be more efficient than aluminum electrodes in reducing parasitic interface oxide and improving capacitor performance. The demonstrated capacitors exhibit high capacitance, low leakage current, and a high cutoff frequency, making them attractive for on-chip energy storage applications.