4.7 Article

Securing information using a proposed reliable chaos-based stream cipher: with real-time FPGA-based wireless connection implementation

Journal

NONLINEAR DYNAMICS
Volume 111, Issue 1, Pages 801-830

Publisher

SPRINGER
DOI: 10.1007/s11071-022-07824-6

Keywords

Chaos; Cryptography; Telecommunication; FPGA; Real-time; Channel noise; Dynamical degradation; Synchronization

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This paper proposes a robust chaos-based stream cipher (CBSC) that addresses the challenges in chaos-based cryptography. The CBSC includes modules such as a synchronization circuit, a perturbation block, an encryption scheme, and a control parameters' generator, providing efficient encryption and statistical properties, as well as good security features.
In this paper, a robust chaos-based stream cipher (CBSC) is proposed. The novelty of this work is that it addresses all challenges confronting chaos-based cryptography. The PCBSC (proposed CBSC) has a robust synchronization circuit that mitigates the effect of channel noise, a perturbation block that overcomes the dynamical degradation, a robust encryption scheme, and an efficient control parameters' generator that generates strong keys. According to the complexity evaluation, the improved chaotic map provides good statistical properties. This can be confirmed by the obtained high values of the statistical metrics (largest Lyapunov exponent, approximate entropy, permutation entropy, and sample entropy) used for the evaluation. According to the security analysis, the PCBSC has good security features and provides strong keys that ensure confusion property, as well as enough space to withstand brute-force attacks. On the other hand, the proposed encryption scheme proves its efficiency; the result of the differential attack clearly shows that the diffusion property is guaranteed. Additionally, the original images' statistical properties are completely dispersed on the encrypted images. The obtained performance over noisy channels proves the synchronization circuit's efficiency. When compared to other proposals, the PCBSC provides the best results. In addition, the PCBSC is implemented on an FPGA and evaluated in real-time over a wireless link.

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