Switching Loss Optimization for a Pulsewidth Modulation Strategy With Reduced CMV and Improved Output Harmonic Distortion for a Three-Level NPC Converter

Extra switching generates additional switching power loss, thus leading to the reduction of the efficiency of a system. Therefore, the article aims to reduce the switching power loss incurred owing to the extra switching in the transition of two carriers in the previously proposed strategy (RCMV1), which features reduced common-mode voltage and improved output harmonic distortion for a three-level neutral point clamped converter. First, a thorough analysis of extra switching in RCMV1 is presented. Second, based on this analysis and the two degrees of freedom in implementing a per-carrier switching sequence, two pulsewidth modulation schemes, namely RCMV1A-SLO and RCMV1B-SLO, are proposed to minimize the switching loss by online calculating the number of extra switchings between two switching sequences at the kth and (k-1)th sampling instants, which determines which degree of freedom of the switching sequence at the kth instant yields the least number of commutations. Simulation and experimental results confirm an improvement of switching loss performance in RCMV1A-SLO and RCMV1B-SLO over RCMV1. Finally, a comparative analysis of output harmonic distortion between the two proposed schemes and the conventional phase opposition disposition is presented, demonstrating a superior harmonic performance of the two proposed ones over POD-SPWM.

Automated summary

This article aims to reduce the switching power loss by proposing two pulsewidth modulation schemes and conducting simulation and experimental verification. The results show that these two schemes outperform the conventional one in terms of switching loss performance and harmonic performance.