4.8 Article

Embedded Fully FPGA-Based Real-Time Simulators for Static Power Converters With Power Switch Characteristics Approximated by Identification

Journal

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume 69, Issue 9, Pages 9624-9633

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2021.3112999

Keywords

Switches; Transfer functions; Mathematical models; Field programmable gate arrays; Load modeling; Data models; Real-time systems; Embedded real time simulation; field programmable gate array (FPGA); static power converters; system identification

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This article proposes a new approach for designing embedded real-time simulators for power electronic converters. The approach utilizes dedicated coefficient varying transfer functions to approximate the voltage/current characteristics of each power switch. By employing parallel computing models and real measurements, high identification accuracy can be achieved. The use of field programmable gate array devices allows for low latencies and short simulation time steps.
This article suggests a new approach for designing embedded real-time (RT) simulators for power electronic converters. The main concept is to approximate the voltage/current characteristics of each power switch by dedicated coefficient varying transfer functions. The latterare obtained through system identification. The potential of such approach is the possibility to make this identification from real measurements and considering the end-user electrical/thermal environment. The converter is then structured into independent switching cells, represented by dedicated RT models that are executed in parallel. This is the same inside each switching cell model where the inherent transfer functions are simultaneously activated. Furthermore, each transfer function has been implemented with a parallel form giving the possibility to achieve high identification accuracy without compromising the timing performances. Then, with such full-parallel organization and using field programmable gate array devices, it is possible to achieve very low latencies and consequently, a short simulation time step. This article presents the developed proof of concept, applied to power converters with different levels of complexity, namely, a half-bridge dc-dc, a full-bridge dc-ac, and multilevel cascaded H-bridge (5-level and 9-level) power converters. For each case study, RT results are provided, analyzed, and compared withtheir offline counterparts.

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