Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 69, Issue 9, Pages 3841-3850Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2022.3182145
Keywords
DC-DC converter; hybrid converter; reduced inductor current; flying capacitor voltage balancing; low voltage conversion ratio; highly-integrated; Type-III compensation
Categories
Funding
- National Natural Science Foundation of China [62122001]
- Macao Science and Technology Development Fund (FDCT) [SKL-AMSV(UM)-2020-2022]
- BUPT-2022-2025
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This paper presents a single-stage tri-path buck converter with reduced inductor current and self-balanced flying capacitor voltage. The proposed converter utilizes capacitor paths to decrease conduction loss and realizes a low voltage conversion ratio. Additionally, it eliminates the need for extra gate drivers by reusing the flying capacitor voltages.
This paper presents a single-stage tri-path buck converter with reduced inductor current and self-balanced flying capacitor voltage. The proposed converter introduces capacitor paths to reduce the average inductor current and inductor current ripple, hence decreasing the conduction loss. Operating with two states per conversion cycle, it exhibits a relatively low voltage conversion ratio of D/(1 + 2D). Besides, it realizes a self-balanced flying capacitor voltage in the charge redistribution phase. Similar to the conventional buck converter, the proposed converter in continuous-current mode only has two complex poles. Therefore, we design a Type-III compensator to obtain a good transient response. Moreover, the circuit does not require extra supplies for gate drivers due to the reutilization of the flying capacitor voltages, eliminating additional circuit and power overheads. The proposed converter, validated in a 65-nm standard CMOS technology, regulates a 0.7 V - 1 V output voltage from a 3.3 V - 4 V input voltage, delivering a maximum output power of 270 mW. The peak efficiency is 84%, with a switching frequency up to 5 MHz.
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