4.5 Article

Fiber-Array-to-Chip Interconnections With Sub-Micron Placement Accuracy via Self-Aligning Chiplets

Journal

IEEE PHOTONICS TECHNOLOGY LETTERS
Volume 34, Issue 19, Pages 1023-1025

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LPT.2022.3199457

Keywords

Optical fibers; Optical fiber couplers; Couplings; Couplers; Optical fiber devices; Optical fiber networks; Silicon; Optical interconnections; optical fiber coupling; passive alignment; chiplets array

Funding

  1. United States Air Force [FA8650-20-C-1003]
  2. Georgia Tech Institute for Electronics and Nanotechnology National Nanotechnology Coordinated Infrastructure (NNCI), through the National Science Foundation [ECCS-2025462]

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This study utilizes a self-aligning silicon chiplet approach to enable interconnection between arrays of fibers and a silicon-on-insulator substrate. The approach achieves highly scalable surface coupling of optical fibers to gratings through silicon micromachining and 3D printing, providing a potential technology for fiber-to-chip interconnects.
A self-aligning silicon chiplet approach is used on a silicon-on-insulator (SOI) substrate with ridge waveguides and grating couplers to enable interconnection with arrays of fibers. The approach is enabled by silicon micromachining and 3D printing, achieving highly scalable surface coupling of optical fibers to the gratings at repeatable sub-micron placement accuracies. The coupling efficiency relative to that of active fiber alignment at 1550 nm is 79%. Insertion points for 160 fibers across four chiplets are demonstrated. The design, fabrication and assembly processes together provide a potential technology for fiber-to-chip interconnects.

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