4.6 Article

Ultrathin Interfacial Layer and Pre-Gate Annealing to Suppress Virtual Gate Formation in GaN-Based Transistors: The Impact of Trapping and Fluorine Inclusion

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 43, Issue 10, Pages 1613-1616

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2022.3203291

Keywords

AlGaN/GaN HEMT; transistor; passivation; lag phenomena; stability

Funding

  1. Turkish Scientific and Technological Research Council, TUBITAK
  2. Turkcell Technology
  3. Turkish Academy of Sciences

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This study investigates the impact of trapping and fluorine (F) inclusion on the operation of AlGaN/GaN high electron mobility transistors (HEMTs) through structural and electrical analyses. The results show that the SiNx interfacial layer reduces defect formation, while the pre-gate annealing (PGA) process mitigates the virtual gate phenomenon, leading to stable operation with minimized lag performance.
In AlGaN/GaN high electron mobility transistors (HEMTs), the long-term operation of the device is adversely affected by threshold voltage (V-th) instability and current collapse. In this letter, using structural and electrical analyses, the impact of trapping and fluorine (F) inclusion on the device operation is scrutinized. It is found that SiNx interfacial layer significantly reduced the formation of defects, during the ohmic annealing process. Moreover, the incorporation of F ions into GaN bulk, during the gate etch process, triggers the virtual gate phenomenon. This effect has also been mitigated via the pre-gate annealing (PGA) process. As a result of these modifications, a stable operation with minimized lag performance has been achieved. Index

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