Energy Efficient Tri-State CNFET Ternary Logic Gates

Power consumption and especially leakage power are the main concerns of nano MOSFET technology. On the other hand, binary circuits face a huge number of interconnection wires, which results in power dissipation and area. Researchers introduced emerging nanodevices and multiple-valued logic (MVL) as two feasible solutions to overcome the challenges mentioned above. Carbon nanotube field-effect transistor (CNFET) is one of the emerging technologies that has some unique properties and advantages over MOSFET, such as adjusting the carbon nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility as P-FET and N-FET transistors. In this paper, we present a novel method for designing ternary logic circuits based on CNFETs. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state, which saves power while the circuits are not in use. Moreover, we designed a two-digit adder/subtractor and a power-efficient ternary logic arithmetic logic unit (ALU) based on the proposed gates. The proposed ternary circuits are simulated using HSPICE via standard 32 nm CNFET technology. The simulation results indicate the designs' correct operation under different process, voltage, and temperature (PVT) variations. Also, simulation results show that the two-digit adder/subtractor using our proposed gates has 12X and 5X lower power consumption and power-delay product (PDP), respectively, compared to previous designs.

Automated summary

This paper introduces a novel method for designing ternary logic circuits based on carbon nanotube field-effect transistors (CNFETs). The proposed circuits have been simulated and shown to operate correctly under different process, voltage, and temperature variations. Additionally, the two-digit adder/subtractor and power-efficient ternary logic ALU using the proposed gates exhibit significantly lower power consumption and power-delay product compared to previous designs.