High-performance thin-film transistor device architecture for flexible and printed electronics

A device design paradigm for thin-film transistors (TFTs) suitable for fabrication using methods available for flexible and printed electronics devices and circuits is described. The TFT architecture utilizes an array of nanospike-shaped electrodes as the source and drain electrodes. This results in improved carrier injection, greater gate control of the drain current, and lower threshold and operating voltage. The on-currents are also higher in comparison with standard flat edge electrode TFTs with equivalent channel dimensions. Importantly, the design is very tolerant of thick gate insulators. The proposed architecture requires one level of relatively high resolution patterning of the source and drain contacts, which can be potentially realized with methods that have been previously employed in flexible electronics such as nanoimprint lithography or roll-to-roll photolithography. The experimental data presented in this paper were obtained from TFTs fabricated using conventional fabrication methods, as the emphasis in this paper is on the device design and in demonstrating the advantageous features of the new architecture in future flexible systems.

Automated summary

This paper presents a device design paradigm for thin-film transistors (TFTs) suitable for flexible and printed electronics fabrication. The proposed architecture utilizes nanospike-shaped electrodes as the source and drain electrodes, resulting in improved carrier injection, gate control, and lower voltage requirements. The design is also tolerant of thick gate insulators and requires only one level of high-resolution patterning.