Journal
ELECTRONICS
Volume 11, Issue 12, Pages -Publisher
MDPI
DOI: 10.3390/electronics11121897
Keywords
VCO array; low phase noise; wideband; CMOS; SDR
Categories
Funding
- National Key R&D Program of China [2019YFB2204602]
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This paper presents a four-core LC-VCO array in 55 nm CMOS technology. The tuning range is expanded based on the multi-core VCO array technology and the switched capacitor array technology, achieving phase noise optimization in a wide tuning range. The proposed VCO array has a measured oscillation frequency range of about 3.7-10 GHz and low phase noise.
This paper presents a four-core LC-VCO array in 55 nm CMOS technology. Based on the multi-core VCO array technology and the switched capacitor array technology, the tuning range is expanded, and the phase noise optimization in a wide tuning range is achieved based on the second harmonic noise filtering technology and the Q value degeneration technology, as well as the optimization of the capacitor array switching transistors. The proposed VCO array, occupying a chip area of 1.65 x 1.44 mm(2), realizes a measured oscillation frequency range of about 3.7-10 GHz with phase noise of -127.5 similar to-116.08 dBc/Hz at 1 MHz frequency offset, and achieves an output power of 2.69 dBm from a total power consumption of 52.8 mW.
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