Screen printing of silver nanoparticles on the source/drain electrodes of organic thin-film transistors

Herein, we systematically investigate the screen printing of Ag nanoparticle (AgNP) inks for the use of source and drain (S/D) electrodes of organic thin-film transistors (OTFTs), controlling printing process condition such as printing speed annealing temperature, as well as the surface modification for the substrate. The optimization of screen-printed AgNPs showed high electrical conductivity, nice pattern-fidelity and good adhesion to the substrate. Although the printed AgNP pattern indicated the thickness of about 11 mu m (measured at the center area of the pattern) which is too high compared with that of semiconductor layer (~100 nm), the edge side of the pattern showed the trapezoid shape with an angle of 18.2 degrees enabling the feasible charge injection and extraction between electrodes and semiconductor layer. Based on the optimized AgNP S/D electrode, the OTFTs with 2,9-didecyl-dinaphtho-[2,3-b:2,3-f]-thieno-[3,2-b]thiophene (C10-DNTT) semiconductor layer were fabricated on Si/ SiO2 and flexible polyethylene terephthalate (PET) substrates with bottom-gate, bottom-contact (BGBC) and topgate, bottom-contact (TGBC) device structure, respectively. Consequently, BGBC on Si/SiO2 showed the best device performance, with a /4FET of 0.186 cm2V- 1s- 1 and threshold voltage (Vth) of -0.41 V. In addition, TGBC OTFTs on the PET substrate obtained an electrical performance with a /4FET of 0.012 cm2V- 1s- 1.

Automated summary

In this study, the screen printing of Ag nanoparticle inks for the electrodes of organic thin-film transistors (OTFTs) was systematically investigated. The printing process conditions and substrate surface modification were controlled to optimize the printing process. The resulting Ag nanoparticle electrodes showed high electrical conductivity, pattern-fidelity, and adhesion to the substrate. OTFTs with different device structures were fabricated using the optimized Ag nanoparticle electrodes, and the best device performance was achieved on Si/SiO2 substrates with a bottom-gate, bottom-contact (BGBC) structure.