Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 69, Issue 8, Pages 4183-4187Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2022.3181572
Keywords
Gate-all-around (GAA); InGaAs; nanowire; quantum confinement effect; volume inversion
Funding
- Center for the Semiconductor Technology Research from The Featured Areas Research Center Program
- Ministry of Science and Technology, Taiwan [MOST 111-2634-F-A49-008-SB, MOST 111-2622-8-A49-018-SB]
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This article investigates the electrical properties of In0.53Ga0.47 As gate-all-around (GAA) MOS-FETs with different nanowire shapes. InGaAs GAA MOS-FETs with trapezoid and triangle nanowire shapes were fabricated and characterized. It was observed that the output performance improved as the nanowire top width reduced from 20 to 11 nm, but degraded when the nanowire top width decreased to nearly 0 nm. TCAD simulation was performed to study the electron density distribution for different nanowire widths and explain the carrier transport mechanism in these ultralow-scale transistor devices.
In this article, we investigate the electrical properties of In0.53Ga0.47 As gate-all-around (GAA) MOS-FETs with different nanowire shapes. InGaAs GAA MOS-FETs with trapezoid and triangle nanowire shapes have been fabricated and characterized. Improved output performance was observed as the nanowire top width reduces from 20 to 11 nm. It was found that the electrical characteristics degraded as the nanowire top width was decreased to nearly 0 nm. To explain the carrier transport mechanism in ultralow-scale devices, TCAD simulation has been performed to study the electron density distribution for different nanowire widths and explain the transport mechanism in these ultralow-scale transistor devices.
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