Journal
APPLIED PHYSICS LETTERS
Volume 121, Issue 6, Pages -Publisher
AIP Publishing
DOI: 10.1063/5.0095468
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Funding
- MEXT Program for research and development of next-generation semiconductor to realize energy-saving society [JPJ005357, JPJ009777]
- JSPS KAKENHI [19H00767]
- MEXT [JPMXP09A20AE0012, JPMXP09A21AE0015, JPMXP09A21BE0017]
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The interface properties and energy band alignment of SiO2/GaN MOS structures on N-polar and Ga-polar GaN substrates were investigated, revealing differences in thermal stability and electrical performance. Caution is needed when using N-polar GaN substrates for MOS device fabrication due to increased gate leakage current.
The interface properties and energy band alignment of SiO2/GaN metal-oxide-semiconductor (MOS) structures fabricated on N-polar GaN(000 (1) over bar) substrates were investigated by electrical measurements and synchrotron-radiation x-ray photoelectron spectroscopy. They were then compared with those of SiO2/GaN MOS structures on Ga-polar GaN(0001). Although the SiO2/GaN(000 (1) over bar) structure was found to be more thermally unstable than that on the GaN(0001) substrate, excellent electrical properties were obtained for the SiO2/GaN(000 (1) over bar) structure by optimizing conditions for post-deposition annealing. However, the conduction band offset for SiO2/GaN(000 (1) over bar) was smaller than that for SiO2/GaN(0001), leading to increased gate leakage current. Therefore, caution is needed when using N-polar GaN(000 (1) over bar) substrates for MOS device fabrication.
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