Journal
ELECTRONICS
Volume 11, Issue 5, Pages -Publisher
MDPI
DOI: 10.3390/electronics11050749
Keywords
ultrasound imaging system; ADC; pipelined-SAR; reference sharing; op-amp sharing; stage resolution distribution
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Funding
- National Key Research and Development Project [2020YFC0122100]
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This paper presents a calibration-free, 16-channel, 14-bit ADC for ultrasound imaging systems. It achieves a high-performance and power-efficient design through reference sharing and optimized architecture. The ADC demonstrates competitive performance in ultrasound applications.
This paper presents a calibration-free, 16-channel, 14-bit, 50-MS/s, pipelined successive approximation register (pipelined-SAR) analog-to-digital converter (ADC) for ultrasound imaging systems. A reference sharing scheme with reduced buffers is proposed to improve area-and-power efficiency, which is essential for multi-channel systems. Based on this, a three-stage, pipelined-SAR ADC architecture with reference/op-amp sharing and optimized stage resolution distribution is proposed. The prototype ADC is designed in a 0.18-mu m process with peripheral circuits integrated, including low-voltage differential signaling (LVDS), bandgap, etc. It achieves a robust and calibration-free performance with 68.25-dB signal to noise and distortion ratio (SNDR) and 82.19-dB spurious-free dynamic range (SFDR), translating into a competitive figure of merit (FoM) of 0.47 pJ/conversion-step among other high-resolution ADCs used in ultrasound applications.
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