Review of Highly Mismatched III-V Heteroepitaxy Growth on (001) Silicon

Si-based group III-V material enables a multitude of applications and functionalities of the novel optoelectronic integration chips (OEICs) owing to their excellent optoelectronic properties and compatibility with the mature Si CMOS process technology. To achieve high performance OEICs, the crystal quality of the group III-V epitaxial layer plays an extremely vital role. However, there are several challenges for high quality group III-V material growth on Si, such as a large lattice mismatch, highly thermal expansion coefficient difference, and huge dissimilarity between group III-V material and Si, which inevitably leads to the formation of high threading dislocation densities (TDDs) and anti-phase boundaries (APBs). In view of the above-mentioned growth problems, this review details the defects formation and defects suppression methods to grow III-V materials on Si substrate (such as GaAs and InP), so as to give readers a full understanding on the group III-V hetero-epitaxial growth on Si substrates. Based on the previous literature investigation, two main concepts (global growth and selective epitaxial growth (SEG)) were proposed. Besides, we highlight the advanced technologies, such as the miscut substrate, multi-type buffer layer, strain superlattice (SLs), and epitaxial lateral overgrowth (ELO), to decrease the TDDs and APBs. To achieve high performance OEICs, the growth strategy and development trend for group III-V material on Si platform were also emphasized.

Automated summary

Si-based group III-V material is of great importance for optoelectronic integration chips (OEICs) due to their excellent optoelectronic properties and compatibility with Si CMOS process technology. However, high-quality growth of III-V material on Si faces challenges such as lattice mismatch, thermal expansion coefficient difference, and dissimilarity between III-V material and Si, leading to the formation of high threading dislocation densities (TDDs) and anti-phase boundaries (APBs). This review discusses defects formation and suppression methods for III-V material growth on Si substrate and highlights advanced technologies to decrease the TDDs and APBs. The growth strategy and development trend for III-V material on Si platform are also emphasized.