4.6 Article

Design and Simulation of Logic-In-Memory Inverter Based on a Silicon Nanowire Feedback Field-Effect Transistor

Journal

MICROMACHINES
Volume 13, Issue 4, Pages -

Publisher

MDPI
DOI: 10.3390/mi13040590

Keywords

feedback field-effect transistor; logic-in-memory; mixed-mode simulation; positive feedback loop; silicon nanowire

Funding

  1. National Research Foundation of Korea (NRF) - Korean government (MSIT) [2020R1A2C3004538]
  2. Brain Korea 21 Plus Project of 2022 through the NRF - Ministry of Science, ICT & Future Planning
  3. Korea University Grant
  4. National Research Foundation of Korea [2020R1A2C3004538] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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In this paper, a logic-in-memory (LIM) inverter using a silicon nanowire (SiNW) structure is proposed. Simulation results show that the inverter has high voltage gain and zero static power consumption.
In this paper, we propose a logic-in-memory (LIM) inverter comprising a silicon nanowire (SiNW) n-channel feedback field-effect transistor (n-FBFET) and a SiNW p-channel metal oxide semiconductor field-effect transistor (p-MOSFET). The hybrid logic and memory operations of the LIM inverter were investigated by mixed-mode technology computer-aided design simulations. Our LIM inverter exhibited a high voltage gain of 296.8 (V/V) when transitioning from logic '1' to '0' and 7.9 (V/V) when transitioning from logic '0' to '1', while holding calculated logic at zero input voltage. The energy band diagrams of the n-FBFET structure demonstrated that the holding operation of the inverter was implemented by controlling the positive feedback loop. Moreover, the output logic can remain constant without any supply voltage, resulting in zero static power consumption.

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