Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing

In recent years, AI-based applications have been used more frequently in many different areas. More and more convolutional neural network models for AI applications have been proposed to improve accuracy compared to other methods like pattern matching or traditional image processing. However, the required computing power for AI applications during inference phases exceeds the processing ability of most edge computing systems. In this work, we target a hardware/software co-design framework to accelerate the performance of CNN-based edge computing applications. The proposed framework targets FPGA technology, which offers much flexibility to update or configure the computing systems for different purposes or working conditions. The framework allows designers to explore design space quickly to achieve better results without much effort. We implement our prototype version with an FPGA-based MPSoC platform using the MobileNet CNN model. The experimental results show that our system is always better than a quad-core ARM Cortex-A53 processor by achieving speed-ups by up to 69.4x. Compared to an Intel Core i7 CPU, the proposed system performs speed-ups by up to 4.67x. However, sometimes our system is not as good as the Intel CPU due to huge communication overhead. Synthesis results also report that our system can function at 159 MHz and consumes only 3.179 W, which is suitable for edge computing applications.

Automated summary

In recent years, AI-based applications have become more prevalent in various fields. However, the computing power required for AI applications exceeds the capabilities of most edge computing systems. This research proposes a hardware/software co-design framework that utilizes FPGA technology to accelerate CNN-based edge computing applications. Experimental results show significant speed-ups compared to traditional processors.