4.8 Article

Impedance Modeling of Three-Phase Grid-Connected Voltage Source Converters With Frequency-Locked-Loop-Based Synchronization Algorithms

Journal

IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 37, Issue 4, Pages 4511-4525

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2021.3121314

Keywords

Impedance; Phase locked loops; Power conversion; Converters; Synchronization; Frequency locked loops; Computational modeling; Adaptive filters; frequency-locked loops (FLLs); grid synchronization; impedance model; linearization; observers; phase-locked loops (PLLs); stability; synchronous reference frame (SRF); three-phase systems; voltage source converter (VSC)

Funding

  1. Deanship of Scientific Research (DSR), King Abdulaziz University, Jeddah [FP-149-43]
  2. VILLUM FONDEN [25920]

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With the increasing use of voltage source converters (VSCs) in the power grid, concerns about resonance/stability issues arising from interactions among converters and between converters and the AC grid are growing. The common method for investigating these issues is impedance modeling of VSCs, which involves linearizing their control elements such as current control and grid synchronization systems. However, the available options for grid synchronization are not limited to phase-locked loops (PLLs), and frequency-locked loops (FLLs) can also be found in literature. This article aims to address the challenge of impedance modeling for three-phase VSCs with FLL-based grid synchronization systems, presenting and investigating several case studies.
With the increased installation of voltage source converters (VSCs) into the power grid, concerns about resonance/stability issues associated with interactions among converters, and between them and the ac grid is growing. The prevailing method for investigating these issues is the impedance modeling of VSCs, which involves linearizing all their control elements, such as their current control and grid synchronization system among others. In this process, most often a phase-locked loop (PLL) is considered for the grid synchronization of VSCs in the literature. The available options for the grid synchronization, however, are not limited to PLLs; a large number of frequency-locked loops (FLLs) for the grid synchronization of VSCs may also be found in the literature. The impedance modeling of three-phase VSCs equipped with FLL-based grid synchronization systems can be quite challenging as FLLs have different structures compared to PLLs. This article aims to address this difficulty. The general idea is obtaining the PLL counterparts of FLLs, which makes the VSC impedance modeling very straightforward. To make this idea clear, several case studies are presented and investigated.

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