4.8 Article

Investigation of Capacitor Voltage Balancing in Practical Implementations of Flying Capacitor Multilevel Converters

Journal

IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 37, Issue 3, Pages 2921-2935

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2021.3119409

Keywords

Capacitors; Voltage; Logic gates; Inductors; Prototypes; Impedance; Switching frequency; Capacitor balancing; dc-dc converter; flying capacitor multilevel; GaN; gate driver; hybrid converter; multilevel power converter; switched capacitor; three-level

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This article investigates the origins of voltage imbalance in practical implementations of flying capacitor multilevel (FCML) converters and presents corresponding circuit analysis and solutions to improve balancing. The study demonstrates that the source impedance and input capacitance can greatly affect capacitor balancing and that an FCML converter with an even number of levels has stronger immunity to disturbances. It is also found that gate signal propagation delay mismatch and variations in on-state resistance among switches have a relatively small impact on capacitor voltage balancing.
Capacitor voltage natural balancing is an attractive feature of flying capacitor multilevel (FCML) converters. However, with the commonly used phase-shifted pulsewidth modulation, the capacitor voltages still can deviate, and active balancing is often required. Although the natural balancing mechanism and its dynamics have been extensively studied in existing literature, some sources that are responsible for capacitor imbalance in engineering practice are still unclear. This article experimentally investigates the origins of the voltage imbalance in practical implementations of such converters. It presents the corresponding circuit analysis as well as solutions that improve balancing. It is shown that the source impedance and the input capacitance can greatly deteriorate capacitor balancing. Moreover, we also demonstrate in theory and with experiments that an FCML converter with an even number of levels inherently has stronger immunity to such disturbance than that with an odd number of levels. It is also found that the gate signal propagation delay mismatch in half-bridge gate drivers can lead to capacitor imbalance, and this problem is addressed by an alternative gate drive power supply design. Finally, the variations of on-state resistance among different switches are found to have a relatively small impact on capacitor voltage balancing.

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