Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 69, Issue 4, Pages 2196-2202Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2022.3154693
Keywords
4F(2) bit cell; dynamic random access memory (DRAM); In-Ga-Zn-O (IGZO); plasma-enhanced atomic layer deposition (PEALD)
Funding
- National Natural Science Foundation of China [61890944, 61725404, 61874134, 61720106013]
- Strategic Priority Research Program of Chinese Academy of Sciences [XDB30030000, XDB30030300]
- National Key Research and Development Program of China [2019YFA0706100]
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In this paper, a stackable vertical channel-all-around (CAA) In-Ga-Zn-O field-effect transistor (IGZO FET) is proposed for high-density DRAM application. The electrical performance of the device is studied and optimized, and the feasibility of the proposed BEOL-compatible 2T0C DRAM is demonstrated through experimental results.
For the first time, we propose a stackable vertical channel-all-around (CAA) In-Ga-Zn-O field-effect transistor (IGZO FET) for high-density 4F(2) and long-retention 2T0C dynamic random access memory (DRAM) application. The device is fabricated in a back-end-of-line (BEOL) compatible process flow where the channel and gate-stack are deposited by plasma-enhanced atomic layer deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device's electrical performance is studied. An optimized 50-nm channel-length CAA IGZO FET achieved I-ON > 30 mu A/mu m and I-OFF below 1.8 x 10(-17) mu A/mu m at V-DS = 1 V. A long retention of 300 s has been experimentally verified for the CAA IGZO 2T0C bit cell, making it a potential candidate for low-power 2T0C DRAM with ultralow refresh frequency. Finally, by monolithically stacking the vertical CAA IGZO FETs with 130-nm critical dimension (CD) to form 2T0C bit cells, we demonstrate the feasibility of the proposed BEOL-compatible 2T0C DRAM for further density scaling beyond 4F(2).
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