4.6 Article

Temperature-Dependent Dynamic Performance of p-GaN Gate HEMT on Si

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 69, Issue 6, Pages 3302-3309

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2022.3167342

Keywords

Logic gates; HEMTs; Threshold voltage; Temperature measurement; Voltage measurement; MODFETs; Performance evaluation; Dynamic characteristics; GaN HEMT; low temperature electronics; p-type GaN gate

Funding

  1. ShanghaiTech University Startup Fund [2017F0203-000-14]
  2. National Natural Science Foundation of China [52131303]
  3. Natural Science Foundation of Shanghai [22ZR1442300]
  4. CAS Strategic Science and Technology Program [XDA18000000]

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The temperature-dependent dc and dynamic characteristics of p-GaN gate HEMT were investigated, and it was found that the drain current improved at low temperature. The mechanisms of threshold voltage shift were analyzed, and the activation energies for hole emission and trapping processes were obtained. The detailed study of temperature-reliant dynamic performance provides useful information for low-temperature applications and device optimizations of p-GaN gate HEMT.
Temperature-dependent dc and dynamic characteristics of p-GaN gate HEMT were thoroughly investigated from 300 to 140 K. At low temperature, in addition to barely shifted threshold voltage, substantial improvement in drain current was observed. At 300 K both positive and negative gate bias stressing were applied to the device in order to form a complete mapping of threshold voltage instability of p-GaN gate HEMT. Three mechanisms, namely hole trap emission, carrier out-spilling, and hole accumulation have been employed to elucidate the trends of threshold voltage shift at room temperature. Temperature-dependent dynamic performances, including threshold voltage instability and drain current degradation, were investigated. Via drain current transient spectroscopy, activation energy for hole emission and trapping process were extracted as 132 and 70 meV, respectively. Detailed pulsed output characteristics at various quiescent biases were explored. At 300 K, gate quiescent bias played a dominant role in determining current collapse compared with drain quiescent bias. Moreover, current collapse caused by gate pulse stressing was much mitigated with decrease of temperature. The detailed temperature-reliant dynamic performance provides valuable information for justifying feasibility of p-GaN gate HEMT for low-temperature applications and further device optimizations.

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