4.6 Article

Fully Distributed Discrete-Time Control of DC Microgrids With ZIP Loads

Journal

IEEE SYSTEMS JOURNAL
Volume 16, Issue 1, Pages 155-165

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSYST.2020.3038664

Keywords

Microgrids; Voltage control; Stability analysis; Load modeling; Impedance; Communication networks; Steady-state; DC microgrids; discrete-time (DT) control; distributed control; load sharing; voltage regulation; ZIP loads

Funding

  1. U.S. Office of Naval Research [N00014-18-1-2185]

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This article presents a novel distributed DT control scheme for load current sharing and bus voltage regulation in dc microgrids. A sparse communication network is utilized to achieve proportional load current sharing, and a distributed voltage observer is designed to estimate and regulate the weighted average bus voltage. The control gains are constrained to alleviate the destabilizing effect induced by DT sampling, and a sufficient condition on CPLs is proposed to counteract their negative impact on stability. Simulation studies validate the control scheme's effectiveness and robustness.
In a multibus dc microgrid, both the constant power loads (CPLs) and the discrete-time (DT) sampling of digital controllers tend to destabilize the system. To address these issues, a novel distributed DT control scheme is presented in this article to achieve proportional load current sharing and weighted average bus voltage regulation in dc microgrids with constant impedance loads, constant current loads, and CPLs (ZIP loads). First, a dc microgrid model with ZIP loads is established in the DT domain, based on which the distributed DT controller is developed. A sparse communication network is then exploited to achieve the proportional load current sharing by exchanging sampled current information between neighbors. Specifically, a distributed voltage observer utilizing the neighbors' current information and local voltage information is designed to estimate and regulate the weighted average bus voltage. To alleviate the destabilizing effect induced by the DT sampling of digital controllers, a constrained condition on control gains is established. Additionally, a sufficient condition on CPLs that guarantees their negative impact on stability being locally counteracted is proposed. Through Lyapunov synthesis, the objectives of current sharing and voltage regulation are proved to be achieved simultaneously. Simulation studies on a detailed switch-level model validate the control scheme and demonstrate its robustness against communication network imperfections and the capability of accommodating plug-and-play operations.

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