4.6 Article

A Calibration-Free Energy-Efficient IC for Link-Adaptive Real-Time Energy Storage Optimization of CM Inductive Power Receivers

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 57, Issue 3, Pages 793-802

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2021.3123160

Keywords

Receivers; Energy storage; Integrated circuits; Optimization; Capacitors; Wireless communication; Switches; Automatic optimization; current-mode (CM) receiver; energy storage efficiency; energy storage maximization; fully wireless implants; implantable neurostimulators; inductive link; loosely-coupled; neural implant; wireless power transfer (WPT)

Funding

  1. Natural Sciences and Engineering Research Council of Canada (NSERC)

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The study presents an integrated circuit designed for maximizing energy storage efficiency in resonant inductive current-mode power receivers, which dynamically adapts its optimal solution to changes in physical or electrical parameters. Experimentally validated for different inductive links, the IC improves energy storage efficiency by 53% and 67%, compared to conservative schemes, and its power consumption is significantly lower than the energy saved through optimization.
The design, development, and experimental characterization of an integrated circuit (IC) for maximizing the energy storage efficiency in resonant inductive current-mode (CM) power receivers are presented. The IC is designed to monitor the receiver's incident energy and to determine and employ an optimal timing scheme for controlling its operation to maximize energy storage for a given period of time. Thanks to continuous monitoring of incident waveform dynamics, the IC automatically adapts its optimal solution on-the-fly to any change in the inductive link's physical or electrical parameters (e.g., Q-factor variations and coils movement). To minimize the IC's power consumption, all the high-speed blocks for monitoring, optimization point computation, and system control are implemented using analog circuits, making the solution needless of a high-speed analog-to-digital converter (ADC)/digital-to-analog converter (DAC). The IC is fabricated in a standard 0.18 mu m CMOS process with an active area of 0.45 mm(2). Its efficacy in real-time optimization of energy storage efficiency is experimentally validated for two different inductive links, showing perfect agreement with empirical measured data and theoretical predictions. Our measurement results show that by using the presented IC, the energy storage efficiency is improved by 53% and 67% for the two tested links, compared to the conservative schemes used for the receiver's operation control. It has also been shown that the IC's power consumption in the worst case scenario is two orders of magnitude smaller than the energy it saves through optimization. To the best of our knowledge, this is the first reported integrated link-adaptive calibration-free solution for optimizing the energy storage efficiency in CM inductive receivers.

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