Journal
APPLIED SURFACE SCIENCE
Volume 581, Issue -, Pages -Publisher
ELSEVIER
DOI: 10.1016/j.apsusc.2022.152427
Keywords
Electrical homogeneity; Large memory window; Multilevel switching; Low-k dielectric; SiO2 interface layer; Resistive switching
Categories
Funding
- National R&D Program through the National Research Foundation of Korea (NRF) - Ministry of Science and ICT [2020M3F3A2A01082593, 2021R1C1C1004422]
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This study demonstrates the use of a low-k dielectric layer to alleviate variability, enhance ON/OFF ratio, improve data retention and endurance, and reduce operating voltage in Pt/HfO2/SiO2/TaN memory devices. A conducting model based on variability and ON/OFF ratio enhancement is established to clarify the physical mechanism behind the improved switching properties.
Two-terminal resistive switching (RS) memories have attracted considerable interest for use in storage class memory and in-memory computing applications. However, resistive random-access memory involves limitations such as large RS variability, low endurance, and high operating voltage owing to the stochastic nature of the conductive filament construction and disruption. These issues can be overcome by maximizing the ON/OFF ratio between the low resistive state (LRS, ON-state) and high-resistive state (HRS, OFF-state). In this study, a low-k dielectric (SiO2) layer is inserted between the HfO2 switching layer and high oxygen affinity tantalum oxy-nitride electrode to alleviate the variability and enhance the ON/OFF ratio of Pt/HfO2/SiO2/TaN memory devices. The low-k dielectric barrier layer functions as an oxygen reservoir and can help achieve a high ON/OFF ratio (>10(4)), data retention (10(4) s), endurance (>1000 cycles), and switching uniformity as well as a low operating voltage at room temperature. The switching time for reversible ON and OFF switching is 0.06 ms and 0.3 ms, respectively. Ohmic behavior in the ON-state and Schottky emission in the high field area of the OFF-state correspond to the current transport conduction processes. Finally, a conducting model based on the variability and ON/OFF ratio enhancement is established to clarify the physical mechanism. The inclusion of a low-k dielectric as an interface layer can enhance the switching properties and ON/OFF ratio, facilitating the use of the proposed device in nonvolatile memory applications.
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