Pushing the Level of Abstraction of Digital System Design: A Survey on How to Program FPGAs

Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous reconfigurable fabric. They are state-of-the-art for prototyping, telecommunications, embedded, and an emerging alternative for cloud-scale acceleration. However, FPGA adoption found limitations in their programmability and required knowledge. Therefore, researchers focused on FPGA abstractions and automation tools. Here, we survey three leading digital design abstractions: Hardware Description Languages (HDLs), High-Level Synthesis (HLS) tools, and Domain-Specific Languagess (DSLs). We review these abstraction solutions, provide a timeline, and propose a taxonomy for each abstraction trend: progranuning models for HDLs; Intellectual Property (IP)-based or System-based toolchains for HLS; application, architecture, and infrastructure domains for DSLs.

Automated summary

This article surveys three leading digital design abstractions for FPGAs: HDLs, HLS tools, and DSLs, and provides a taxonomy and timeline for each abstraction trend.