Journal
SENSORS
Volume 21, Issue 19, Pages -Publisher
MDPI
DOI: 10.3390/s21196456
Keywords
ADC; biosensor; CMOS; delta-sigma modulation; neural interface; VCO-ADC; VLSI
Funding
- ETH Postdoctoral Fellowship
- European Research Council [694829]
- Swiss National Science Foundation [205320_188910/1]
- Swiss National Science Foundation (SNF) [205320_188910] Funding Source: Swiss National Science Foundation (SNF)
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This article presents a compact and low-power CMOS readout circuit for bioelectrical signals based on a second-order delta-sigma modulator, achieving high performance and small size through optimized design.
This article reports on a compact and low-power CMOS readout circuit for bioelectrical signals based on a second-order delta-sigma modulator. The converter uses a voltage-controlled, oscillator-based quantizer, achieving second-order noise shaping with a single opamp-less integrator and minimal analog circuitry. A prototype has been implemented using 0.18 mu m CMOS technology and includes two different variants of the same modulator topology. The main modulator has been optimized for low-noise, neural-action-potential detection in the 300 Hz-6 kHz band, with an input-referred noise of 5.0 mu V-rms, and occupies an area of 0.0045 mm(2). An alternative configuration features a larger input stage to reduce low-frequency noise, achieving 8.7 mu V-rms in the 1 Hz-10 kHz band, and occupies an area of 0.006 mm(2). The modulator is powered at 1.8 V with an estimated power consumption of 3.5 mu W.
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