4.4 Article

A capacitive pressure-sensitive chip with linkage film

Journal

MICROELECTRONICS JOURNAL
Volume 118, Issue -, Pages -

Publisher

ELSEVIER SCI LTD
DOI: 10.1016/j.mejo.2021.105313

Keywords

Pressure-sensitive chip; Capacitive mode; Linkage film; Linear response; SOI wafer

Funding

  1. National Natural Science Foundation of China [61372019]

Ask authors/readers for more resources

A novel pressure-sensitive chip with a linkage film was designed to improve the performance of capacitive pressure sensors. The chip, featuring a composite three-layer membrane on the top electrode plate, showed significant improvements in linear operation range and linearity through finite element analysis. The sample chip, trial-produced using SOI wafers and silicon fusion bonding process, exhibited high sensitivity and low non-linearity in the pressure range of 20-64 kPa.
In order to enhance the performance of capacitive pressure sensors, a novel pressure-sensitive chip with linkage film is designed. In this construct, its top electrode plate adopts a composite three-layer membrane. A finite element method is used to analyze the response characteristics of the sensitive construct, and the simulated results show that significant improvements in the linear operation range and the linearity can be achieved. A sample chip with a scale range of 0-100 kPa is trial-produced by using SOI wafers combined with the silicon silicon fusion bonding process, and the process flow is presented. The tested results indicate that the sensitivity of the sample chip reaches 0.057 pF/kPa in the pressure range of 20-64 kPa, and its non-linearity is about 3.1%FS.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.4
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available