4.8 Article

A Novel Modular Multilevel Converter Based on Interleaved Half-Bridge Submodules

Journal

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume 70, Issue 1, Pages 125-136

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2022.3146516

Keywords

Legged locomotion; Voltage; Inductors; Topology; Capacitors; Standards; Multilevel converters; Charging stations; electric vehicles (EVs); interleaved; modular multilevel converters (MMCs); pulsewidth modulation (PWM)

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A new Modular Multilevel Converter with Interleaved half-bridge Sub-Modules (ISM-MMC) is proposed in this article, which exhibits higher modularity and scalability for ultrafast chargers. A hybrid modulation scheme is implemented to exploit the advantages of the interleaving scheme. Comparative study verifies the effectiveness of the proposed topology.
A new Modular Multilevel Converter with Interleaved half-bridge Sub-Modules (ISM-MMC) is proposed in this article. The ISM-MMC exhibits higher modularity and scalability in terms of current ratings with respect to a conventional MMC while preserving the typical voltage-level adaptiveness. The ISM-MMC brings the known advantages of classical MMC to low-voltage, high-current applications making it a novel candidate for the sector of ultrafast chargers for all types of electric vehicles (EVs). This advanced topology makes it possible to easily reach the charging power of the EV charging system up to 4.5 MW and beyond with a low-voltage supply. To operate the new converter, a hybrid modulation scheme that helps to exploit the advantages of the interleaving scheme is implemented and explained in this article. It has been verified that the typical MMC control methods are still applicable for ISM-MMC. A comparative study between classical MMC and ISM-MMC configurations in terms of output characteristics and efficiency is also given. Furthermore, it has been demonstrated that the number of ac voltage levels is synthetically multiplied by the number of interleaved half-bridge legs in submodules. Simulations, hardware in the loop, and experimental tests are carried out to demonstrate the feasibility of the proposed topology and the implemented modulation scheme.

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