4.6 Article

Acceleration of Semiconductor Device Simulation With Approximate Solutions Predicted by Trained Neural Networks

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 68, Issue 11, Pages 5483-5489

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2021.3075192

Keywords

Mathematical model; Electric potential; Semiconductor devices; Numerical models; Electrostatics; Computational modeling; Poisson equations; Convolutional neural network (CNN); deep learning; drift diffusion; initial guess; metal-oxide-semiconductor field-effect transistor (MOSFET); neural network; TCAD simulation

Funding

  1. National Research Foundation of Korea (NRF) - Korea Government [NRF-2019R1A2C1086656, NRF-2020M3H4A3081800]
  2. Institute for Information and Communications Technology Promotion (IITP) - Korea Government (MSIT), Development of Ultra Low-Power Mobile Deep Learning Semiconductor With Compression/Decompression of Activation/Kernel Data [2019-0-01351]
  3. National Research Foundation of Korea [2020M3H4A3081800] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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A method for accelerating semiconductor device simulation using neural networks has been proposed, where a trained neural network predicts an initial solution to reduce computational costs. Specifically, a convolutional neural network computes the initial solution for MOSFET, considering device templates and a compact expression based on electrostatic potential. Empirical results show significant acceleration in simulation with this proposed method.
In order to accelerate the semiconductor device simulation, we propose to use a neural network to learn an approximate solution for desired bias conditions. With an initial solution (predicted by a trained neural network) sufficiently close to the final one, the computational cost to calculate several unnecessary solutions is significantly reduced. Specifically, a convolutional neural network for the metal-oxide-semiconductor field-effect transistor (MOSFET) is trained in a supervised manner to compute the initial solution. In particular, we propose to consider a device template for various devices and a compact expression of the solution based on the electrostatic potential. We empirically show that the proposed method accelerates the simulation significantly.

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