4.6 Article

A Wafer-Level Packaged CMOS MEMS Pirani Vacuum Gauge

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 68, Issue 10, Pages 5155-5161

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2021.3103486

Keywords

CMOS MEMS; Pirani; thermistor; vacuum gauge; wafer-level packaged

Funding

  1. Natural Science Foundation of Guangdong Province [2020A1515011555]
  2. Natural Science Foundation of Shenzhen University (SZU) [860-2110309]
  3. High-End Talent Research Fund [827-000451]

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This article presents a wafer-level packaged Pirani vacuum gauge using InvenSense CMOS MEMS technology, demonstrating high performance and integration for vacuum monitoring. The Pirani vacuum gauge achieves high sensitivity and low heating power in a very fine vacuum regime.
In this article, we report a wafer-level packaged Pirani vacuum gauge using the proprietary InvenSense CMOS MEMS technology. The micro Pirani vacuum gauge features three serpentine-shaped molybdenum thermistors on the suspended silicon-on-insulator (SOI) bridges, while the wiring gap of each serpentine-shaped silicon microbridge is 1.6 mu m. For the vacuum range of 5 x 10(-4)-760 Torr, the CMOS MEMS Pirani gauge configured with a constant temperature interface circuit achieves a sensitivity of 0.414 V/Torr in a very fine vacuum regime, while its heating power is less than 21.3 mW. Moreover, the measured output of the micro Pirani gauge shows good agreement with a semi-empirical model, while the model predicts that the proposed Pirani gauge can measure a vacuum pressure as low as 2.6 x 10(-4) Torr. The performance achieved by this Pirani vacuum gauge combined with its high level of integration makes it a promising Internet of Things (IoT) sensing node for vacuum monitoring in the industry.

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