Journal
IEEE TRANSACTIONS ON DIELECTRICS AND ELECTRICAL INSULATION
Volume 29, Issue 1, Pages 47-53Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TDEI.2022.3146569
Keywords
Electric fields; Partial discharges; Copper; Encapsulation; Silicon carbide; Substrates; Metallization; Encapsulation; high-voltage techniques; insulation; partial discharge (PD); semiconductor device packaging
Funding
- Chinese National Natural Science Foundation [51922075, 52177189, U1966212]
- Tianjin Municipal Science and Technology Bureau [21JCJQJC00150]
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This article presents a high-voltage packaging method for >15-kV SiC power devices, which includes an optimized stacked direct bond copper (DBC) substrate and a field-dependent conductivity (FDC) encapsulation using SiC as the filler. The proposed FDC encapsulation is proven to be a promising alternative to commercial silicone, with significant improvements in partial discharge initial voltage (PDIV) and maximum voltage rating.
Silicon carbide (SiC) is capable of improving the blocking voltage of power devices. It is essential to package SiC power devices for high-voltage applications. This article proposes a high-voltage packaging method for >15-kV SiC power devices by designing an optimized stacked direct bond copper (DBC) substrate with a copper ring and a field-dependent conductivity (FDC) encapsulation using SiC as the filler. The proposed FDC encapsulation is proven as a promising encapsulation as commercial silicone. The partial discharge initial voltage (PDIV) of the demonstrated module using the proposed method can be improved to at least 18.31 kV, which is increased by 163.77% compared with the typical 34-mm insulated gate bipolar transistor (IGBT) modules. The maximum voltage rating of the demonstrated module could be enhanced to at least 15 kV with a sufficient protection margin, i.e., 20%. It gives guidance to the packaging of >15-kV SiC power devices.
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