4.7 Article

An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory

Related references

Note: Only part of the references are listed.
Article Engineering, Electrical & Electronic

Analysis and mitigation of parasitic resistance effects for analog in-memory neural network acceleration

T. Patrick Xiao et al.

Summary: This study analyzes the impact of parasitic resistance on the accuracy of convolutional neural network inference and comprehensively examines how design decisions affect the system's sensitivity to parasitic resistance effects, providing guidelines for designing analog accelerator hardware that is robust to parasitic resistance.

SEMICONDUCTOR SCIENCE AND TECHNOLOGY (2021)

Article Engineering, Electrical & Electronic

Compute-in-Memory Chips for Deep Learning: Recent Trends and Prospects

Shimeng Yu et al.

Summary: Compute-in-memory (CIM) is a new computing paradigm that addresses the memory-wall problem by performing multiply-and-accumulate (MAC) operations in the analog domain within memory sub-array, leading to significant improvements in throughput and energy efficiency for deep learning. SRAM and RRAM are promising candidates to store the weights of deep neural network (DNN) models.

IEEE CIRCUITS AND SYSTEMS MAGAZINE (2021)

Proceedings Paper Engineering, Multidisciplinary

Optimized programming algorithms for multilevel RRAM in hardware neural networks

Valerio Milo et al.

Summary: Multilevel programming is crucial for RRAM in neural network accelerators, with gate-based algorithms demonstrating the highest reliability in minimizing resistance variations. The optimized scheme successfully implemented a neural network with 9-level weights, achieving a recognition accuracy of 91.5% in MNIST compared to 93.27% in software.

2021 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) (2021)

Article Computer Science, Hardware & Architecture

CxDNN: Hardware-software Compensation Methods for Deep Neural Networks on Resistive Crossbar Systems

Shubham Jain et al.

ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS (2020)

Article Multidisciplinary Sciences

Fully hardware-implemented memristor convolutional neural network

Peng Yao et al.

NATURE (2020)

Article Multidisciplinary Sciences

Accurate deep neural network inference using computational phase-change memory

Vinay Joshi et al.

NATURE COMMUNICATIONS (2020)

Review Nanoscience & Nanotechnology

Memory devices and applications for in-memory computing

Abu Sebastian et al.

NATURE NANOTECHNOLOGY (2020)

Article Computer Science, Hardware & Architecture

A Domain-Specific Supercomputer for Training Deep Neural Networks

Norman P. Jouppi et al.

COMMUNICATIONS OF THE ACM (2020)

Review Physics, Applied

Analog architectures for neural network acceleration based on non-volatile memory

T. Patrick Xiao et al.

APPLIED PHYSICS REVIEWS (2020)

Proceedings Paper Computer Science, Hardware & Architecture

TIMELY: Pushing Data Movements and Interfaces in PIM Accelerators Towards Local and in Time Domain

Weitao Li et al.

2020 ACM/IEEE 47TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2020) (2020)

Article Computer Science, Hardware & Architecture

An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT)

Yuan Du et al.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2019)

Article Computer Science, Hardware & Architecture

Three-Dimensional NAND Flash for Vector-Matrix Multiplication

Panni Wang et al.

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2019)

Proceedings Paper Engineering, Electrical & Electronic

Reducing the Impact of Phase-Change Memory Conductance Drift on the Inference of large-scale Hardware Neural Networks

S. Ambrogio et al.

2019 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) (2019)

Proceedings Paper Computer Science, Theory & Methods

Xilinx Adaptive Compute Acceleration Platform: Versal™ Architecture

Brian Gaide et al.

PROCEEDINGS OF THE 2019 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE GATE ARRAYS (FPGA'19) (2019)

Article Computer Science, Hardware & Architecture

A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

Yun Long et al.

IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS (2019)

Article Computer Science, Hardware & Architecture

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave

Eric Chung et al.

IEEE MICRO (2018)

Article Engineering, Electrical & Electronic

Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator

Matthew J. Marinella et al.

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS (2018)

Article Computer Science, Hardware & Architecture

Newton: Gravitating Towards the Physical Limits of Crossbar Acceleration

Anirban Nag et al.

IEEE MICRO (2018)

Article Engineering, Electrical & Electronic

Analogue signal and image processing with large memristor crossbars

Can Li et al.

NATURE ELECTRONICS (2018)

Article Engineering, Electrical & Electronic

Efficient Processing of Deep Neural Networks: A Tutorial and Survey

Vivienne Sze et al.

PROCEEDINGS OF THE IEEE (2017)

Article Computer Science, Hardware & Architecture

CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories

Rajeev Balasubramonian et al.

ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION (2017)

Proceedings Paper Computer Science, Artificial Intelligence

In-Datacenter Performance Analysis of a Tensor Processing Unit

Norman P. Jouppi et al.

44TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2017) (2017)

Review Engineering, Electrical & Electronic

Resistive switching memories based on metal oxides: mechanisms, reliability and scaling

Daniele Ielmini

SEMICONDUCTOR SCIENCE AND TECHNOLOGY (2016)

Review Engineering, Electrical & Electronic

Access devices for 3D crosspoint memory

Geoffrey W. Burr et al.

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B (2014)

Article Engineering, Electrical & Electronic

A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS

Lukas Kull et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2013)

Article Engineering, Electrical & Electronic

A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation

Craig R. Schlottmann et al.

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS (2011)

Article Multidisciplinary Sciences

The missing memristor found

Dmitri B. Strukov et al.

NATURE (2008)

Article Engineering, Electrical & Electronic

Performance and reliability features of advanced nonvolatile memories based on discrete traps (silicon nanocrystals, SONOS)

B De Salvo et al.

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY (2004)