Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 69, Issue 2, Pages 657-667Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2021.3121214
Keywords
Transistors; Voltage; Resistance; MOSFET; Mathematical models; Resistors; Current mirrors; Pseudo-resistor; CMOS design; subthreshold design; high resistance; high time constant; bio-signal amplifier
Categories
Funding
- Coordenacao de Aperfeicoamento de Pessoal de Nivel Superior (CAPES) [001, 698503P]
- Conselho Nacional de Desenvolvimento Cientifico e Tecnologico (CNPq)
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This paper presents the design of tunable CMOS pseudo-resistors, utilizing current sources of extremely low currents and transistors operating in subthreshold to achieve large and predictable resistance values. The effects of leakage currents from reverse-biased pn-junctions on the pseudo-resistor resistance are also evaluated. The proposed pseudo-resistor circuit was validated in a 180 nm CMOS process as part of a filter, with resistances between 180 G ohm and 700 G ohm providing adjustable low-frequency poles for a band-pass filter from 0.6 Hz to 2 Hz.
This paper presents the design of tunable CMOS pseudo-resistors aimed at achieving large and predictable resistance values. Instrumental to the proposed pseudo-resistor is the design of current sources of extremely low currents and transistors operating in subthreshold. The effects of the leakage currents of reverse-biased pn-junctions on the pseudo-resistor resistance are also evaluated. The proposed pseudo-resistor circuit was validated while in use as part of a filter integrated in a 180 nm CMOS process. Pseudo-resistors with resistances between 180 G omega and 700 G omega were employed to obtain low-frequency poles of a band-pass filter adjustable from 0.6 Hz to 2 Hz.
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