4.7 Article

Linear Readout Circuit for Simultaneously Accessing Two Elements in the Two-Dimensional Resistive Sensor Array

Journal

IEEE SENSORS JOURNAL
Volume 21, Issue 21, Pages 24254-24262

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSEN.2021.3117279

Keywords

Sensors; Sensor arrays; Integrated circuit modeling; Switches; Resistance; Measurement errors; Mathematical models; 2-D resistive sensor array; measurement error; readout circuit

Funding

  1. Natural Science Foundation of Jiangsu Province [BK20201276]
  2. Foundation of Guangxi Key Laboratory of Automatic Detecting Technology and Instruments [YQ20203]
  3. Fundamental Research Funds for the Central Universities
  4. Postgraduate Research & Practice Innovation Program of Jiangsu Province [SJCX20_0049]

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Researchers have developed a novel linear readout circuit to address the non-linear relationship between output voltage and resistance in the sensor array. Experimental results showed that the circuit can read two elements simultaneously with linear output and its performance can be quickly evaluated using mathematical expressions of equivalent resistance.
Most readout circuits of the two-dimensional resistive sensor array (2-D RSA) have a non-linear relationship between the output voltage and the resistance of the element being tested (EBT), which will cause extra measurement error for the finite precision of the analog-to-digital converter. Firstly, we designed a novel linear readout circuit based on double voltage feedback loops (LRC-DVFL) which could access two elements in the array simultaneously, and the output voltages had a linear relationship with the resistances of the EBTs. Then, the approximate circuit model of the LRC-DVFL was derived and the mathematical equivalent resistance expressions of the EBTs were derived in Appendix. Followed, the simulation experiments and the test experiments with a prototype circuit of the LRC-DVFL were carried out. Experimental results show that the LRC-DVFL can access two elements in the 2-D RSA simultaneously with linear output voltages, and the performance of the LRC-DVFL can be evaluated quickly by using the mathematical equivalent resistance expressions of the EBTs.

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