4.7 Article

Design and Analysis of a Low-Power Readout Circuit for CdZnTe Detectors in 0.13-μm CMOS

Journal

IEEE SENSORS JOURNAL
Volume 16, Issue 4, Pages 903-911

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSEN.2015.2495228

Keywords

Analog front-end; CdZnTe; ASIC; X-ray; gamma-ray; low-noise; low-power; VLSI

Funding

  1. Natural Sciences and Engineering Research Council of Canada (NSERC)
  2. Institute for Computing, Information and Cognitive Systems (ICICS), University of British Columbia

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In this paper, the design of a low-power low-noise readout circuit for cadmium zinc telluride (CdZnTe or CZT) detectors is presented. Such sensors are used in a variety of applications, including medical imaging, security, and astrophysics. The readout circuit includes a charge-sensitive amplifier (CSA), a reset network to accommodate the leakage current of the detector, and a first-order pulse shaper with a pole-zero cancellation circuit. The CSA has two gain settings for 0-5- and 5-45-fC injected charge, and the pulse shaper is designed to provide four different shaping times. The discharge time constant of the CSA can also be adjusted to accommodate various event rates. Furthermore, a comprehensive noise analysis of the readout system is presented. To facilitate the noise analysis, the equivalent noise charge (ENC) equations are derived analytically. The optimization of the noise performance of the front-end circuit is also discussed. The application-specific integrated circuit is fabricated in a 0.13-mu m CMOS process. For a detector capacitance of 250 fF, the measured ENC varies from 66 to 101 (e) over bar -rms depending on the peaking time. The measured power consumption of the readout circuit is just under 1 mW from a 1.2 V supply.

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