Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 51, Issue 1, Pages 31-44Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2015.2477046
Keywords
Energy efficient design; integrated voltage regulator (IVR); low power; low voltage; power gating; subthreshold
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The Internet of Things (IoT) is widely predicted to comprise billions of connected devices, many of which will be wireless sensor nodes (WSN). Energy efficiency is a huge challenge here, followed by node cost and ease of software (SW) development. Addressing all of the above, this paper presents an 11.7 pJ/cycle subthreshold ARM Cortex-M0+ WSN processing subsystem implemented in low-leakage 65 nm CMOS. Voltage and frequency scalability is from 850 nW active power at 250 mV to 66 MHz above 900 mV, with a fully integrated 82% peak-efficiency voltage regulator for direct-battery operation, and supporting 80 nW CPU and RAM state-retention power gating for SW transparent leakage reduction. SW and system optimization approaches are described and a 2.94 mu W SW ECG workload is presented.
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