4.8 Article

MoS2 Synapses with Ultra-low Variability and Their Implementation in Boolean Logic

Journal

ACS NANO
Volume 16, Issue 2, Pages 2866-2876

Publisher

AMER CHEMICAL SOC
DOI: 10.1021/acsnano.1c09904

Keywords

MoS2; cycle-to-cycle variability; device-to-device variability; interface-mediated; non-volatile; memristor; synapse; threshold logic gate

Funding

  1. CAREER [NSF-ECCS-1845331]
  2. Technology Innovation Program - MOTIE, Korea [20010542]
  3. NSF Major Research Instrumentation (MRI) [1726636]
  4. Korea Evaluation Institute of Industrial Technology (KEIT) [20010542] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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In this study, ultra-low-variability synapses were demonstrated using chemical vapor deposited 2D MoS2 and Ti/Au electrodes. The interface and device stability were verified using transmission electron microscopy and other techniques. Additionally, the feasibility of integrating MoS2 synapses with MoS2 leaky integrate-and-fire neurons for logic gate implementation was shown.
Brain-inspired computing enabled by memristors has gained prominence over the years due to the nanoscale footprint and reduced complexity for implementing synapses and neurons. The demonstration of complex neuromorphic circuits using conventional materials systems has been limited by high cycle-to-cycle and device-to-device variability. Two-dimensional (2D) materials have been used to realize transparent, flexible, ultra-thin memristive synapses for neuromorphic computing, but with limited knowledge on the statistical variation of devices. In this work, we demonstrate ultra-low-variability synapses using chemical vapor deposited 2D MoS2 as the switching medium with Ti/Au electrodes. These devices, fabricated using a transfer-free process, exhibit ultra-low variability in SET voltage, RESET power distribution, and synaptic weight update characteristics. This ultra-low variability is enabled by the interface rendered by a Ti/Au top contact on Si-rich MoS2 layers of mixed orientation, corroborated by transmission electron microscopy (TEM), electron energy loss spectroscopy (EELS), and X-ray photoelectron spectroscopy (XPS). TEM images further confirm the stability of the device stack even after subjecting the device to 100 SET-RESET cycles. Additionally, we implement logic gates by monolithic integration of MoS2 synapses with MoS2 leaky integrate-and-fire neurons to show the viability of these devices for non-von Neumann computing.

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