Journal
ACS APPLIED MATERIALS & INTERFACES
Volume 14, Issue 9, Pages 11873-11882Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsami.1c21743
Keywords
effective oxide thickness; atomic layer deposition; carbon nanotubes; field effect transistor; metal oxide semiconductor capacitors
Funding
- TSMC
- NNCI [ECCS-1542148, ECCS-1542152]
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A low-temperature AlOx process was used to deposit high nucleation density oxide layers on carbon materials, enabling the growth of sub-nanometer gate oxides. Electrical measurements and simulations demonstrated the feasibility of using this low-temperature AlOx process for gate oxides on carbon nanotubes, showing potential for carbon-based electronic device applications.
A new generation of compact and high-speed electronic devices, based on carbon, would be enabled through the development of robust gate oxides with sub-nanometer effective oxide thickness (EOT) on carbon nanotubes or graphene nanoribbons. However, to date, the lack of dangling bonds on sp(2) oriented graphene sheets has limited the high precursor nucleation density enabling atomic layer deposition of sub-1 nm EOT gate oxides. It is shown here that by deploying a low-temperature AlOx (LT AlOx) process, involving atomic layer deposition (ALD) of Al2O3 at 50 degrees C with a chemical vapor deposition (CVD) component, a high nucleation density layer can be formed, which templates the growth of a high-k dielectric, such as HfO2. Atomic force microscopy (AFM) imaging shows that at 50 degrees C, the Al2O3 spontaneously forms a pinhole-free, sub-2 nm layer on graphene. Density functional theory (DFT) based simulations indicate that the spreading out of AlOx clusters on the carbon surface enables conformal oxide deposition. Device applications of the LT AlOx deposition scheme were investigated through electrical measurements on metal oxide semiconductor capacitors (MOSCAPs) with Al2O3/HfO2 bilayer gate oxides using both standard Ti/Pt metal gates as well as TiN/Ti/Pd gettering gates. In this study, LT AlOx was used to nucleate HfO2 and it was shown that bilayer gate oxide stacks of 2.85 and 3.15 nm were able to achieve continuous coverage on carbon nanotubes (CNTs). The robustness of the bilayer was tested through deployment in a CNT-based field-effect transistor (FET) configuration with a gate leakage of less than 10(-8) A/mu m per CNT.
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