4.7 Article

Topology and Voltage-Balance Control of a Single-Phase Active Neutral Point Clamped Seven-Level Inverter

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2020.3038779

Keywords

Inverters; Capacitors; Topology; Switches; Voltage control; Power harmonic filters; Discharges (electric); Karnaugh map; seven-level; variable reference; voltage-balance

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This article introduces a novel single-phase active neutral point clamped seven-level inverter with reduced power switch quantity and voltage stresses to address the issue of capacitor voltage imbalance. A variable-reference voltage-balance control method is proposed to control the middle capacitor voltage at 1/3 of the dc-link voltage, demonstrated through simulation and experimental results.
This article proposed a single-phase active neutral point clamped seven-level (SANPC-7L) inverter topology with only eight power switches and three dc-link capacitors. Compared with the existing single-phase seven-level inverters, the quantity of power switches and voltage stresses across them are both reduced. Modulation logic expression of every switch is derived based on the Karnaugh map technique. Like the existing counterparts with three series-connected dc-link capacitors, there is a severe capacitor voltage imbalance issue. This issue is hard to address as there are no redundant switching states that can be selected to balance the dc-link capacitor voltages. This article gives a comprehensive analysis on the capacitor voltage imbalance issue. It indicates that the over charge or discharge of the middle capacitor voltage is the root cause of this issue, while the upper and lower capacitor voltages can be automatically balanced. To overcome this issue, a variable-reference voltage-balance control method is used to enable a three-level voltage waveform to appear in every switching period, and thus the middle capacitor voltage can be controlled at 1/3 of the dc-link voltage. Both the simulation and experimental results have been presented to verify the proposed topology with the variable-reference voltage-balance control strategy.

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