4.7 Review

Surface Nano-Patterning for the Bottom-Up Growth of III-V Semiconductor Nanowire Ordered Arrays

Journal

NANOMATERIALS
Volume 11, Issue 8, Pages -

Publisher

MDPI
DOI: 10.3390/nano11082079

Keywords

semiconductor nanowire ordered arrays; substrate patterning; nanowire metasurfaces

Funding

  1. Italian MIUR, program PRIN 2017, project Photonic Extreme Learning Machine (PELM) [20177PSCKT]
  2. QUANTERA ERA-NET- Quantum Technologies, SUPERTOP project, H2020 grant [731473]
  3. FET-OPEN project AndQC, H2020 grant [828948]

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This review discusses recent progresses in substrate nanopatterning methods and strategies for the bottom-up growth of vertically aligned semiconductor nanowire arrays, focusing on III-V semiconductor nanowires. While exploring controlled location, size, and morphology of each nanowire, the concepts and conclusions presented can also be applied to different nanowire materials.
Ordered arrays of vertically aligned semiconductor nanowires are regarded as promising candidates for the realization of all-dielectric metamaterials, artificial electromagnetic materials, whose properties can be engineered to enable new functions and enhanced device performances with respect to naturally existing materials. In this review we account for the recent progresses in substrate nanopatterning methods, strategies and approaches that overall constitute the preliminary step towards the bottom-up growth of arrays of vertically aligned semiconductor nanowires with a controlled location, size and morphology of each nanowire. While we focus specifically on III-V semiconductor nanowires, several concepts, mechanisms and conclusions reported in the manuscript can be invoked and are valid also for different nanowire materials.

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