4.7 Article

Observer-Based PID Security Control for Discrete Time-Delay Systems Under Cyber-Attacks

Journal

IEEE TRANSACTIONS ON SYSTEMS MAN CYBERNETICS-SYSTEMS
Volume 51, Issue 6, Pages 3926-3938

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TSMC.2019.2952539

Keywords

Security; PD control; PI control; Delays; Observers; Upper bound; Tuning; Deception attacks; denial-of-service (DoS) attacks; exponentially mean-square input-to-state stability (ISS); observer-based proportional-integral-derivative (PID) control; security control

Funding

  1. National Natural Science Foundation of China [61873148, 61873169, 61933007]
  2. Research Grants Council of Hong Kong Special Administrative Region [9042223, CityU 11200717]
  3. Alexander von Humboldt Foundation of Germany

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This article addresses the observer-based proportional-integral-derivative (PID) security control problem for a type of linear discrete time-delay systems under cyber-attacks. A novel observer-based PID controller is proposed to achieve the desired security level and ensure the system stability, with sufficient conditions derived for exponentially mean-square input-to-state stability and upper bound of the quadratic cost criterion (QCC) obtained. The effectiveness of the design approach is demonstrated through an illustrative example.
This article deals with the observer-based proportional-integral-derivative (PID) security control problem for a kind of linear discrete time-delay systems subject to cyber-attacks. The cyber-attacks, which include both denial-of-service and deception attacks, are allowed to be randomly occurring as regulated by two sequences of Bernoulli distributed random variables with certain probabilities. A novel observer-based PID controller is proposed such that the closed-loop system achieves the desired security level and the quadratic cost criterion (QCC) has an upper bound. Sufficient conditions are derived under which the exponentially mean-square input-to-state stability is guaranteed and the desired security level is then achieved. Subsequently, an upper bound of the QCC is obtained and the explicit expression of the desired PID controller is also parameterized. Finally, the validity of the developed design approach is verified via an illustrative example.

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