Journal
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume 68, Issue 6, Pages 4827-4837Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2020.2989716
Keywords
Capacitors; Inverters; Turning; Switches; Transistors; Topology; Logic gates; Hybrid pulsewidth modulation (PWM) algorithm; multilevel inverter (MLI); switched capacitor (SC)
Categories
Funding
- National Natural Science Foundation of China [51907033]
- Natural Science Foundation of Guangdong Province [2017A030313316]
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A 13-level inverter based on switched-capacitor technique is proposed in this article, which has a simple structure and lower cost per level. It can effectively suppress voltage ripples of capacitors and harmonic components of output voltage. Experimental results demonstrate that the proposed inverter has high efficiency, self-balanced capacitor voltages, and low harmonics.
A 13-level inverter based on switched-capaci-tor technique is proposed in this article. It consists of ten transistors, four diodes, and four capacitors with self-balanced voltages. The ten transistors form two H-bridges and one half-bridge resulting in simple structure and easy design of gate drivers. With a hybrid of level-shifted and phase-shifted pulsewidth modulation algorithm, voltage ripples of capacitors and low harmonic components of output voltage are suppressed simultaneously. Compared with the existing solutions, the proposed 13-level inverter has a simpler structure and the lower cost per level. Experimental results demonstrate that the proposed inverter has the advantages of high boosting factor, self-balanced capacitor voltages, low harmonics, and high efficiency, and the maximum efficiency is up to 97.2%.
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