High-Mobility, Low-Voltage Programmable/Erasable Ferroelectric Polymer Transistor Nonvolatile Memory Based on a P(VDF-TrFE)/PMMA Bilayer Gate Insulator

Low mobility and high operating voltages are bottlenecks in the practical application of ferroelectric organic field-effect transistor (Fe-OFET) nonvolatile memory (NVM). In this article, we demonstrate a highmobility polymer semiconductor-based Fe-OFET NVM that can well operate at low programming/erasing voltages (V-P/V-E). The issue that hinders the reduction of the V-P/V-E in Fe-OFET NVMs is discussed. We develop a route to resolve the issue by building a thin bilayer gate insulator consisted of an ultrathin poly(methylmethacrylate) (PMMA) and a thin poly(vinylidenefluoride-trifluoroethylene) films. The processing compatibility, that is, the tri-layered core architecture consisting of polymer semiconductorand insulator films is prepared by a full-solution technology, is confirmed. The mechanism of the performance improvements by using the ultrathin PMMA in the Fe-OFET NVMs is investigated. As a result, the Fe-OFET NVM exhibits excellent performances at lowV(P)/V-E of +/- 15 V, with a high mobility up to 1.75 cm(2)/Vs, reliablememory endurance over 400 cycles, and stable memory retention over 65 000 s.

Automated summary

The article presents a high mobility polymer semiconductor-based Fe-OFET NVM that operates effectively at low programming/erasing voltages. By building a thin bilayer gate insulator and a processing-compatible tri-layered core architecture, the issue of voltages in Fe-OFET NVMs is addressed. The use of ultrathin PMMA improves the performance of Fe-OFET NVMs.