4.6 Article

Implementation of RTCVD-SiNx Gate Dielectric Into Enhancement-Mode GaN MIS-HEMTs Fabricated on Ultrathin-Barrier AlGaN/GaN-on-Si Platform

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 68, Issue 9, Pages 4274-4277

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2021.3088771

Keywords

Constant-capacitancedeep-level transient spectroscopy (CC-DLTS); normally-OFF GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs); plasma-enhanced-atomic-layer-deposited (PEALD)-SiNx interfacial layer; rapid-thermal-chemical-vapor-deposition (RTCVD)-SiNx dielectric; recess-free gate; ultrathin-barrier (UTB) AlGaN/GaN heterostructure

Funding

  1. National Natural Science Foundation of China [1822407, 61527816, 11634002, 61631021, 62074161, 62004213, U20A20208]
  2. Key Research Program of Frontier Sciences, Chinese Academy of Sciences (CAS) [QYZDB-SSW-JSC012]
  3. National Key Research and Development Program of China [2016YFB0400105, 2017YFB0403000]
  4. Youth Innovation Promotion Association of CAS
  5. University of Chinese Academy of Sciences
  6. Opening Project of Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, CAS

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In this study, enhancement-mode GaN-based MIS-HEMTs were fabricated using RTCVD SiNx gate dielectric and PEALD SiNx interfacial layer, showing low V-TH hysteresis and interface trap density, confirming the improvement of interface quality through various measurements.
Rapid-thermal-chemical-vapor-deposition(RTCVD) SiNx gate dielectric was utilized for the fabrication of enhancement-mode GaN-based metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) on ultrathin-barrier AlGaN/GaN heterostructure. A plasma-enhanced-atomic-layer-deposited (PEALD) SiNx interfacial layer was adopted to mitigate the high-temperature RTCVD process-induced degradation of the dielectric/III-nitride interface. Based on the dc- and pulsed transfer measurement results, the device with the PEALD-SiNx interfacial layer exhibits low V-TH-hysteresis (0.1 V at V-GS = 1, 10 V) and low interface trap density. Constant-capacitance deep-level transient spectroscopy and high-resolution transmission electron microscopy were also conducted to confirm the improvement of the interface quality.

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