Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 68, Issue 6, Pages 2132-2136Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2020.3043204
Keywords
Micro-architecture; RV32IM; RISC-V; functional unit; Baugh Wooley; Booth; veddic; Dadda; FPGA; ARM
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The novel processor micro-architecture based on RISC-V ISA has been implemented on Xilinx Virtex-7 FPGA board, achieving high performance with low power requirements. It outperforms many existing commercial and open-source cores in various benchmark tests, showcasing its superior capabilities in the field of processor design.
Design of high-performance processors with very low power requirement is the primary goal of many contemporary and futuristic applications. This brief presents a novel processor micro-architecture which is capable of achieving these requirements. The micro-architecture is based on RISC-V Instruction Set Architecture (ISA). The core is implemented and verified on Xilinx Virtex-7 FPGA board with a resource requirement of 7617 LUTs and 2319 FFs. This core could achieve a Dhrystone benchmark score of 1.71 DMIPS per MHz which is higher than ARM Cortex-M3 (1.50 DMIPS per MHz) and ARM Cortex-M4 (1.52 DMIPS per MHz). The Coremark benchmark is also tested on this core and it gives 4.13 Coremark per MHz. The physical design result of the core using commercial tools shows that it can achieve a maximum frequency of 198.02 MHz with 0.036 mm(2) area and 17.36 KW/MHz power requirement at UMC 40 nm technology node. The core consumes a dynamic power of 19.75 mu W/MHz at UMC 90nm which is 36% and 40% better than ARM Cortex-M3 and Cortex-M4 respectively and also lower than many others cores. The results show that this core can outperform many existing commercial and open-source cores.
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