Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 68, Issue 8, Pages 3351-3362Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2021.3083280
Keywords
Direction of arrival; MUSIC; array signal processing; FPGA
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Funding
- Architecting Intelligent Cost-effective Central Offices to enable 5G Tactile Internet (ACHILLES) through the Spanish Ministry of Economy and Competitivity [PID2019-104207RB-I00]
- Madrid Government (Comunidad de Madrid-Spain)
- Universidad Carlos III de Madrid (UC3M) [EPUC3M21]
- Context of the V Plan Regional de Investigacion Cientifica e Innovacion Tecnologica (V PRICIT) (Regional Program of Research and Technological Innovation)
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A novel design approach for FPGA implementation of the MUSIC algorithm is proposed in this paper, which significantly reduces both FPGA resources and latency.
The estimation of the Direction of Arrival (DoA) is one of the most critical parameters for target recognition, identification and classification. MUltiple SIgnal Classification (MUSIC) is a powerful technique for DoA estimation. The algorithm requires complex mathematical operations like the computation of the covariance matrix for the input signals, eigenvalue decomposition and signal peak search. All these signal processing operations make real-time and resource-efficient implementation of the MUSIC algorithm on Field Programmable Gate Arrays (FPGAs) a challenge. In this paper, a novel design approach is proposed for the FPGA-implementation of the MUSIC algorithm. This approach enables a significant reduction in both FPGA resources and latency. In more detail, the proposed design enables the estimation of DoA in real-time scenarios in 2 mu sec with 30% to 50% fewer resources as compared to existing techniques.
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